Memory devices are typically provided as internal, semiconductor, integrated circuits in computers or other electronic devices. There are many different types of memory including random-access memory (RAM), read only memory (ROM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), and flash memory, for example.
Cross-point memory is generally defined by a resistive element occurring at an intersection of two conductive lines, e.g., an access line (commonly referred to as a word line) and a data line (commonly referred to as a bit line). FIG. 1 is a schematic of a portion of a basic cross-point memory array 100 having memory cells 102 occurring at intersections of the access lines 138 (e.g., word lines) and the data lines 126 (e.g., bit lines).
Each memory cell 102 of the array 100 includes a resistive element 104 coupled between an access line 138 and a data line 126. Differences in resistivity of the resistive elements 104 generally define the data value for each memory cell 102. For example, memory cells 102 having a resistive element 104 with a relatively higher resistivity may define one data value, such as a logic 0, while memory cells 102 having a resistive element 104 with a relatively lower resistivity may define a different data value, such as a logic 1. By applying a potential difference across a particular set of an access line 138 and a data line 126, a resulting current flow between the two lines can be sensed to determine whether the memory cell 102 occurring at that intersection has the relatively higher or relatively lower resistance. Differing resistivity values may be used to define more than two data states.
Cross-point memory is typically very space efficient, providing high memory density. However, in larger arrays, leakage through unselected or partially selected memory cells can become problematic. For the reasons stated above, and for other reasons stated below which will become apparent to those skilled in the art upon reading and understanding the present specification, there is a need in the art for alternative cross-point memory array architectures.